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| author | Michael Buesch <m@bues.ch> | 2019-05-22 21:06:39 +0200 |
|---|---|---|
| committer | Michael Buesch <m@bues.ch> | 2019-05-22 21:06:39 +0200 |
| commit | 9dc3c7c4994d2056b820139ed21c6376acdb0653 (patch) | |
| tree | 510d4c64ec4e91585c733ccf5f7c95108023a0c8 | |
| parent | 104b78dbc48a878d01759bf0e18c5be5cd58a3a8 (diff) | |
| download | pyprofibus-phy_fpga.zip pyprofibus-phy_fpga.tar.xz | |
phy-fpga: Add CRC error bitphy_fpga
Signed-off-by: Michael Buesch <m@bues.ch>
| -rw-r--r-- | phy_fpga/profibus_phy_mod.v | 23 | ||||
| -rw-r--r-- | pyprofibus/phy_fpga_driver/driver.py | 2 | ||||
| -rw-r--r-- | pyprofibus/phy_fpga_driver/messages.py | 1 |
3 files changed, 24 insertions, 2 deletions
diff --git a/phy_fpga/profibus_phy_mod.v b/phy_fpga/profibus_phy_mod.v index 2fa1afe..a2c55e2 100644 --- a/phy_fpga/profibus_phy_mod.v +++ b/phy_fpga/profibus_phy_mod.v @@ -252,6 +252,7 @@ module profibus_phy #( localparam SPISTAT_SOFTRESET = 2; localparam SPISTAT_TXOVR = 3; localparam SPISTAT_RXOVR = 4; + localparam SPISTAT_CTRLCRCERR = 5; /***********************************************************/ @@ -270,7 +271,8 @@ module profibus_phy #( /* SPICTRL_STATUS should be fetched, if 1. */ wire new_status_available; - assign new_status_available = any_reset_status | tx_buf_overflow_get() | rx_buf_overflow_get(); + assign new_status_available = any_reset_status | tx_buf_overflow_get() | + rx_buf_overflow_get() | spirx_ctrl_crcerr_get(); initial begin n_poweronreset_status <= 0; @@ -551,6 +553,7 @@ module profibus_phy #( reg [7:0] spirx_ctrl; reg [31:0] spirx_ctrl_data; reg [7:0] spirx_crc; + reg [1:0] spirx_ctrl_crcerr; /* Length calculation of PB frames. */ wire spirx_lencalc_n_reset_wire; @@ -579,12 +582,25 @@ module profibus_phy #( spirx_ctrl <= 0; spirx_ctrl_data <= 0; spirx_crc <= 0; + spirx_ctrl_crcerr <= 0; spirx_lencalc_n_reset <= 0; spirx_lencalc_byte <= 0; spirx_lencalc_new <= 0; end + function automatic spirx_ctrl_crcerr_get; + begin spirx_ctrl_crcerr_get = spirx_ctrl_crcerr[0] ^ spirx_ctrl_crcerr[1]; end + endfunction + + task automatic spirx_ctrl_crcerr_set; + begin spirx_ctrl_crcerr[0] = ~spirx_ctrl_crcerr[1]; end + endtask + + task automatic spirx_ctrl_crcerr_reset; + begin spirx_ctrl_crcerr[1] = spirx_ctrl_crcerr[0]; end + endtask + always @(posedge clk) begin if (n_reset & ~softreset) begin case (spirx_state) @@ -745,12 +761,14 @@ module profibus_phy #( spitx_ctrl_reply_data[SPISTAT_SOFTRESET] <= softreset_status; spitx_ctrl_reply_data[SPISTAT_TXOVR] <= tx_buf_overflow_get(); spitx_ctrl_reply_data[SPISTAT_RXOVR] <= rx_buf_overflow_get(); - spitx_ctrl_reply_data[31:5] <= 0; + spitx_ctrl_reply_data[SPISTAT_CTRLCRCERR] <= spirx_ctrl_crcerr_get(); + spitx_ctrl_reply_data[31:6] <= 0; spitx_ctrl_pending <= ~spitx_ctrl_pending_ack; /* Reset all error states. */ tx_buf_overflow_reset(); rx_buf_overflow_reset(); + spirx_ctrl_crcerr_reset(); /* Reset all reset status bits */ n_poweronreset_status <= 1; @@ -821,6 +839,7 @@ module profibus_phy #( spirx_lencalc_n_reset <= 0; rx_buf_overflow_reset(); tx_buf_overflow_reset(); + spirx_ctrl_crcerr_reset(); softreset_status <= softreset; n_hardreset_status <= n_reset; diff --git a/pyprofibus/phy_fpga_driver/driver.py b/pyprofibus/phy_fpga_driver/driver.py index d54d951..0008e63 100644 --- a/pyprofibus/phy_fpga_driver/driver.py +++ b/pyprofibus/phy_fpga_driver/driver.py @@ -211,6 +211,8 @@ class FpgaPhyDriver(object): raise FpgaPhyError("FPGA TX buffer overflow.") if statusBits & (1 << FpgaPhyMsgCtrl.SPISTAT_RXOVR): raise FpgaPhyError("FPGA RX buffer overflow.") + if statusBits & (1 << FpgaPhyMsgCtrl.SPISTAT_CTRLCRCERR): + raise FpgaPhyError("FPGA control message CRC error.") if events & (1 << FpgaPhyProc.EVENT_PARERR): self.__faultParity.fault() diff --git a/pyprofibus/phy_fpga_driver/messages.py b/pyprofibus/phy_fpga_driver/messages.py index 6af8278..81e8365 100644 --- a/pyprofibus/phy_fpga_driver/messages.py +++ b/pyprofibus/phy_fpga_driver/messages.py @@ -111,6 +111,7 @@ class FpgaPhyMsgCtrl(FpgaPhyMsg): SPISTAT_SOFTRESET = 2 SPISTAT_TXOVR = 3 SPISTAT_RXOVR = 4 + SPISTAT_CTRLCRCERR = 5 CTRL_LEN = 8 |