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authorMichael Buesch <mb@bu3sch.de>2011-01-16 23:15:17 +0100
committerMichael Buesch <mb@bu3sch.de>2011-01-16 23:15:17 +0100
commit6ceaa6e1c7e378282a6235bb206fb8daa9a8327f (patch)
tree9dfbbf5e1fdf644ccc823be4ea7e26047c8b07b9 /README-DEVELOPERS.lyx
parent66ff277b235d89ebdcc920d7ddf27a864bcb3655 (diff)
downloadtoprammer-6ceaa6e1c7e378282a6235bb206fb8daa9a8327f.tar.xz
toprammer-6ceaa6e1c7e378282a6235bb206fb8daa9a8327f.zip
Update documentation
Signed-off-by: Michael Buesch <mb@bu3sch.de>
Diffstat (limited to 'README-DEVELOPERS.lyx')
-rw-r--r--README-DEVELOPERS.lyx91
1 files changed, 67 insertions, 24 deletions
diff --git a/README-DEVELOPERS.lyx b/README-DEVELOPERS.lyx
index c263f77..4fe9fcb 100644
--- a/README-DEVELOPERS.lyx
+++ b/README-DEVELOPERS.lyx
@@ -294,8 +294,7 @@ cmdFPGARead(address)
\end_layout
\begin_layout Standard
-Reads a byte from the FPGA and puts it into the microcontroller's buffer
- register.
+Reads a byte from the FPGA and puts it into the buffer register.
\begin_inset Quotes eld
\end_inset
@@ -308,8 +307,11 @@ address
The microcontroller's buffer register has an automagically incrementing
pointer.
So issueing several cmdFPGARead() in a row will result in all the bytes
- being put one after each other into the buffer register.
- The buffer register can hold up to 64 bytes.
+ being put one after another into the buffer register.
+ The buffer register does have a limited size.
+ Overflowing it crashes the programmer, requireing a physical USB disconnect
+ to recover.
+ Call getBufferRegSize() to get the size of the buffer register.
Reading the buffer register (cmdReadBufferReg()) will reset the automagic
pointer to zero.
Note that address 0x10 is fast-tracked and uses one byte less on the USB
@@ -532,6 +534,16 @@ writeLockbits() Write the Lockbit memory.
Reimplement this, if your DUT has Lockbits and supports writing them.
\end_layout
+\begin_layout Description
+readRAM() Read the Random Access Memory.
+ Reimplement this, if your DUT has RAM and supports reading it.
+\end_layout
+
+\begin_layout Description
+writeRAM() Write the Random Access Memory.
+ Reimplement this, if your DUT has RAM and supports writing to it.
+\end_layout
+
\begin_layout Standard
After defining your
\begin_inset Quotes eld
@@ -595,23 +607,24 @@ er/bit/src/ subdirectory and execute the "create.sh" script:
\end_layout
\begin_layout LyX-Code
-./create.sh name_of_chip
+./create.sh bitfile_name
\end_layout
\begin_layout Standard
-Where "name_of_chip" is the name of the new chip.
- Now go to libtoprammer/bit/src/name_of_chip/ and implement the bottom-half
- algorithm in the name_of_chip.v Verilog file.
+Where "bitfile_name" is the name of the new chip's bitfile.
+ (That often matches the chip-ID).
+ Now go to libtoprammer/bit/src/bitfile_name/ and implement the bottom-half
+ algorithm in the bitfile_name.v Verilog file.
To build the .BIT file from the Verilog sources, go to the libtoprammer/bit/
directory and execute:
\end_layout
\begin_layout LyX-Code
-./build.sh name_of_chip
+./build.sh bitfile_name
\end_layout
\begin_layout Standard
-(if you omit the chipname, all chips will be rebuilt).
+(if you omit the bitfile_name, all bitfiles will be rebuilt).
\end_layout
\begin_layout Section
@@ -625,8 +638,8 @@ The automatic layout generator (layout_generator.py) can be used to automaticall
The advantage of using the autogenerator instead of hardcoding the VCC/VPP/GND
connections in the chip implementation is that the autogenerated layout
is portable between TOPxxxx programmers and it is much easier to implement.
- You do not have to search a chip position in the ZIF socket that fits the
- device constraints.
+ You do not have to search for a chip position in the ZIF socket that fits
+ the device constraints.
The autogenerator will do it for you.
\end_layout
@@ -709,9 +722,9 @@ chipPinVCCX This parameter is an integer specifying the VCC pin on the chip
\begin_layout Description
chipPinsVPP This parameter is an integer or a list of integers specifying
the VPP pin(s) on the chip package.
- Note that it specifies the VCC pin on the chip package and _not_ on the
+ Note that it specifies the VPP pin on the chip package and _not_ on the
ZIF socket.
- So if your chip datasheet tells you that VCC is on pin 1, you pass an 1
+ So if your chip datasheet tells you that VPP is on pin 1, you pass a 1
here.
If your chip needs multiple VPP voltages, just pass a list of pins.
Specify all possible VPP pins here.
@@ -721,9 +734,9 @@ chipPinsVPP This parameter is an integer or a list of integers specifying
\begin_layout Description
chipPinGND This parameter is an integer specifying the GND pin on the chip
package.
- Note that it specifies the VCC pin on the chip package and _not_ on the
+ Note that it specifies the GND pin on the chip package and _not_ on the
ZIF socket.
- So if your chip datasheet tells you that VCC is on pin 5, you pass an 5
+ So if your chip datasheet tells you that GND is on pin 5, you pass a 5
here.
\end_layout
@@ -737,20 +750,43 @@ class Chip
\end_inset
constructor, the autogenerator is initialized and ready to be used.
- The following methods can be used to apply or disable a layout:
+ The following
+\begin_inset Quotes eld
+\end_inset
+
+class Chip
+\begin_inset Quotes erd
+\end_inset
+
+ methods can be used to enable or disable a layout:
\end_layout
\begin_layout Description
-applyVCCX(on) This method enables or disables (depending on the parameter)
- a layout.
- Enabling the layout means that the VCCX pin will be actively driven by
- the configured VCCX voltage.
+applyVCCX(on) This method enables or disables (depending on the
+\begin_inset Quotes eld
+\end_inset
+
+on
+\begin_inset Quotes erd
+\end_inset
+
+ parameter) the VCC layout.
+ Enabling the layout means that the VCC pin will be actively driven by the
+ configured VCC voltage.
Disabling the layout will tristate the driver.
\end_layout
\begin_layout Description
applyVPP(on,packagePinsToTurnOn) This method enables or disables (depending
- on the parameter) a layout.
+ on the
+\begin_inset Quotes eld
+\end_inset
+
+on
+\begin_inset Quotes erd
+\end_inset
+
+ parameter) the VPP layout.
Enabling the layout means that the VPP pins will be actively driven by
the configured VPP voltage.
Disabling the layout will tristate the driver.
@@ -779,8 +815,15 @@ on=False
\end_layout
\begin_layout Description
-applyGND(on) This method enables or disables (depending on the parameter)
- a layout.
+applyGND(on) This method enables or disables (depending on the
+\begin_inset Quotes eld
+\end_inset
+
+on
+\begin_inset Quotes erd
+\end_inset
+
+ parameter) the GND layout.
Enabling the layout means that the GND pins will be actively driven by
GND.
Disabling the layout will tristate the driver.
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