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* Add versionrelease-0.1Michael Buesch2010-02-101-1/+5
* Update READMEMichael Buesch2010-02-091-7/+14
* Add lock bit supportMichael Buesch2010-02-093-1/+63
* Shutdown the chip after usageMichael Buesch2010-02-083-4/+22
* atmega8dip28: Implement fuse writingMichael Buesch2010-02-081-0/+22
* atmega8dip28: Implement sig read, eeprom read/writeMichael Buesch2010-02-081-8/+49
* atmega8dip28: Implement Flash writingMichael Buesch2010-02-082-10/+64
* atmega8dip28: Implement chip eraseMichael Buesch2010-02-081-1/+32
* bit/atmega8dip28: Export busy pinMichael Buesch2010-02-084-5/+8
* Fixes for opensource bitfileMichael Buesch2010-02-072-12/+18
* bit/atmega8dip28: Add prebuilt bitfileMichael Buesch2010-02-071-0/+0
* bit/atmega8dip28: Make it work properlyMichael Buesch2010-02-071-27/+72
* Add buildscriptMichael Buesch2010-02-072-0/+37
* bit/atmega8dip28: Synthesize as speed -5Michael Buesch2010-02-072-2/+2
* Add bit makefileMichael Buesch2010-02-077-25/+135
* bit/atmega8dip28: Use nonblocking assignmentsMichael Buesch2010-02-076-22/+13
* Add opensource FPGA config for atmega8dip28Michael Buesch2010-02-077-0/+266
* FPGA byte writing is done through address 0x10Michael Buesch2010-02-072-7/+3
* Add override for device sanity checks.Michael Buesch2010-02-073-9/+43
* Add function for writing to the FPGAMichael Buesch2010-02-073-34/+39
* Document FPGA parallel interface accessMichael Buesch2010-02-071-0/+4
* Document ZIF->FPGA linesMichael Buesch2010-02-041-0/+0
* Update docsMichael Buesch2010-02-012-11/+32
* atmega8: Simplify OE and B1 handlingMichael Buesch2010-02-011-18/+7
* atmega8: Implement fuse readingMichael Buesch2010-02-011-0/+31
* atmega8: Implement signature and eeprom readingMichael Buesch2010-02-011-2/+56
* atmega8: More read loop cleanupsMichael Buesch2010-02-011-8/+3
* Move pin initMichael Buesch2010-02-011-51/+63
* implement chip callback stubsMichael Buesch2010-02-012-0/+62
* Rewrite commandline optsMichael Buesch2010-02-013-73/+128
* atmega8: Cleanup read loopMichael Buesch2010-01-311-9/+5
* Add func to load address wordMichael Buesch2010-01-311-8/+7
* Document FPGA data writingMichael Buesch2010-01-313-3/+9
* Document data fetchingMichael Buesch2010-01-313-21/+39
* atmega8: Define command and address loading subroutines.Michael Buesch2010-01-311-30/+40
* Document more atmega8 pin switchingMichael Buesch2010-01-311-50/+105
* Document atmega8 xtal clockingMichael Buesch2010-01-311-34/+22
* More command splittingMichael Buesch2010-01-312-19/+38
* Disable queuing via commandlineMichael Buesch2010-01-311-4/+17
* Splitup some commandsMichael Buesch2010-01-312-25/+116
* Send blocked commands before readingMichael Buesch2010-01-311-3/+10
* Merge branch 'master' of git.bu3sch.de:/home/git/repos/toprammerMichael Buesch2010-01-302-2/+11
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| * Document FPGA config initMichael Buesch2010-01-302-2/+11
* | add commentsMichael Buesch2010-01-301-0/+0
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* Add fpga->uc connectionsMichael Buesch2010-01-291-0/+0
* Implement command concatenationMichael Buesch2010-01-292-3/+52
* Show progressMichael Buesch2010-01-293-11/+33
* Add missing file util.pyMichael Buesch2010-01-281-0/+47
* Implement atmega8 image readingMichael Buesch2010-01-283-32/+112
* Add read/write stubsMichael Buesch2010-01-283-26/+94
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