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* Splitup some commandsMichael Buesch2010-01-311-1/+1
* Send blocked commands before readingMichael Buesch2010-01-311-3/+10
* Document FPGA config initMichael Buesch2010-01-301-2/+8
* Implement command concatenationMichael Buesch2010-01-291-1/+41
* Show progressMichael Buesch2010-01-291-6/+14
* Implement atmega8 image readingMichael Buesch2010-01-281-29/+27
* Add read/write stubsMichael Buesch2010-01-281-25/+77
* Split up chip implementationsMichael Buesch2010-01-281-50/+53
* Some cleanupsMichael Buesch2010-01-271-3/+4
* Document flush commandMichael Buesch2010-01-271-22/+28
* Document status registerMichael Buesch2010-01-261-9/+22
* Add voltage layout selectionMichael Buesch2010-01-261-6/+8
* Implement and document GND supplyMichael Buesch2010-01-251-2/+12
* Reverse engineer shift register clockingMichael Buesch2010-01-241-6/+18
* Add voltage setting routineMichael Buesch2010-01-241-10/+22
* updatesMichael Buesch2010-01-241-46/+48
* Add bitfile uploadMichael Buesch2009-12-241-0/+21
* Add some initialization stuffMichael Buesch2009-12-241-4/+153
* Initial commitMichael Buesch2009-12-241-0/+68
bues.ch cgit interface