From 098382460369033083a23f1fa20991a5533c9b26 Mon Sep 17 00:00:00 2001 From: Michael Buesch Date: Sun, 7 Feb 2010 14:09:04 +0100 Subject: Add function for writing to the FPGA Signed-off-by: Michael Buesch --- .gitignore | 2 +- chip_atmega8dip28.py | 64 ++++++++++++++++++++++++++-------------------------- toprammer | 7 +++++- 3 files changed, 39 insertions(+), 34 deletions(-) diff --git a/.gitignore b/.gitignore index 2f4cc7a..ace8ff8 100644 --- a/.gitignore +++ b/.gitignore @@ -1,6 +1,6 @@ *~ *.swp *.pyc -*.bit *.cache.* *.bak +*.orig diff --git a/chip_atmega8dip28.py b/chip_atmega8dip28.py index 4acc160..72d5b14 100644 --- a/chip_atmega8dip28.py +++ b/chip_atmega8dip28.py @@ -154,7 +154,7 @@ class ATMega8DIP28(Chip): """Check if a Device Under Test (DUT) is inserted into the ZIF.""" self.top.blockCommands() self.top.cmdFlush() - self.top.send("\x0A\x1D\x86") + self.top.cmdFPGAWrite(0x1D, 0x86) self.top.unblockCommands() self.top.cmdSetGNDPin(0) @@ -163,7 +163,7 @@ class ATMega8DIP28(Chip): self.top.blockCommands() self.top.cmdFlush(2) - self.top.send("\x0A\x1B\xFF") + self.top.cmdFPGAWrite(0x1B, 0xFF) self.top.unblockCommands() self.top.send("\x0E\x28\x00\x00") @@ -192,7 +192,7 @@ class ATMega8DIP28(Chip): self.top.cmdLoadVCCXLayout(0) self.top.cmdFlush() self.top.send("\x0E\x28\x01\x00") - self.top.send("\x0A\x1B\x00") + self.top.cmdFPGAWrite(0x1B, 0x00) self.top.cmdSetVPPVoltage(0) self.top.cmdFlush() self.top.cmdSetVPPVoltage(12) @@ -223,7 +223,7 @@ class ATMega8DIP28(Chip): self.__setXTAL1(0) self.__setXA0(0) self.__setXA1(0) - self.top.send("\x0A\x12\x08") + self.top.cmdFPGAWrite(0x12, 0x08) self.__setBS1(0) self.__setBS2(0) self.__setPAGEL(0) @@ -235,7 +235,7 @@ class ATMega8DIP28(Chip): self.top.blockCommands() self.top.send("\x34") - self.top.send("\x0A\x12\x88") + self.top.cmdFPGAWrite(0x12, 0x88) self.__setOE(1) self.top.cmdFlush() self.top.unblockCommands() @@ -311,52 +311,52 @@ class ATMega8DIP28(Chip): def __setReadMode(self, high): """Put the FPGA into read mode.""" + value = 0x01 if high: - self.top.send("\x0A\x12\x81") - else: - self.top.send("\x0A\x12\x01") + value |= 0x80 + self.top.cmdFPGAWrite(0x12, value) def __setOE(self, high): """Set the OE pin of the DUT""" + value = 0x02 if high: - self.top.send("\x0A\x12\x82") - else: - self.top.send("\x0A\x12\x02") + value |= 0x80 + self.top.cmdFPGAWrite(0x12, value) def __setWR(self, high): """Set the WR pin of the DUT""" + value = 0x03 if high: - self.top.send("\x0A\x12\x83") - else: - self.top.send("\x0A\x12\x03") + value |= 0x80 + self.top.cmdFPGAWrite(0x12, value) def __setBS1(self, high): """Set the BS1 pin of the DUT""" + value = 0x04 if high: - self.top.send("\x0A\x12\x84") - else: - self.top.send("\x0A\x12\x04") + value |= 0x80 + self.top.cmdFPGAWrite(0x12, value) def __setXA0(self, high): """Set the XA0 pin of the DUT""" + value = 0x05 if high: - self.top.send("\x0A\x12\x85") - else: - self.top.send("\x0A\x12\x05") + value |= 0x80 + self.top.cmdFPGAWrite(0x12, value) def __setXA1(self, high): """Set the XA1 pin of the DUT""" + value = 0x06 if high: - self.top.send("\x0A\x12\x86") - else: - self.top.send("\x0A\x12\x06") + value |= 0x80 + self.top.cmdFPGAWrite(0x12, value) def __setXTAL1(self, high): """Set the XTAL1 pin of the DUT""" + value = 0x07 if high: - self.top.send("\x0A\x12\x87") - else: - self.top.send("\x0A\x12\x07") + value |= 0x80 + self.top.cmdFPGAWrite(0x12, value) def __pulseXTAL1(self, count=1): """Do a positive pulse on the XTAL1 pin of the DUT""" @@ -367,16 +367,16 @@ class ATMega8DIP28(Chip): def __setPAGEL(self, high): """Set the PAGEL pin of the DUT""" + value = 0x09 if high: - self.top.send("\x0A\x12\x89") - else: - self.top.send("\x0A\x12\x09") + value |= 0x80 + self.top.cmdFPGAWrite(0x12, value) def __setBS2(self, high): """Set the BS2 pin of the DUT""" + value = 0x0A if high: - self.top.send("\x0A\x12\x8A") - else: - self.top.send("\x0A\x12\x0A") + value |= 0x80 + self.top.cmdFPGAWrite(0x12, value) supportedChips.append(ATMega8DIP28()) diff --git a/toprammer b/toprammer index 7a4e63e..00b57f4 100755 --- a/toprammer +++ b/toprammer @@ -289,10 +289,15 @@ class TOP: """Read a byte from the FPGA data line into the status register.""" self.send("\x01") - def cmdFPGAWriteByte(self, byte): + def cmdFPGAWriteByte(self, byte):#FIXME """Write a byte to the FPGA data line.""" self.send("\x10" + chr(byte)) + def cmdFPGAWrite(self, address, byte): + """Write a byte to an FPGA address.""" + cmd = chr(0x0A) + chr(address) + chr(byte) + self.send(cmd) + def cmdSetGNDPin(self, zifPin): """Assign GND to a ZIF socket pin. 0=none""" valid = (0, 5, 14, 15, 16, 17, 18, 19, 20, 24, 26, 27, -- cgit v1.2.3