From 3479b3013ec567fe451e25c018a1e6609304f072 Mon Sep 17 00:00:00 2001 From: Pavel Štemberk Date: Sat, 22 Feb 2014 17:45:15 +0100 Subject: Add support for pic24f PIC24F04KA200, PIC24F04KA201 PIC24F16KL402, PIC24F08KL402, PIC24F16KL401, PIC24F08KL401, PIC24F08KL302, PIC24F08KL301, PIC24F08KL201, PIC24F08KL200, PIC24F04KL101, PIC24F04KL100 Signed-off-by: Michael Buesch --- libtoprammer/fpga/src/microchip16/microchip16.vh | 300 +++++++++++---------- .../microchip16dip14dip20/microchip16dip14dip20.v | 20 +- .../fpga/src/microchip16/microchip16dip28/Makefile | 3 + .../microchip16dip28/microchip16dip28.v | 90 +++++++ .../fpga/src/microchip16/microchip16sip6/Makefile | 3 + .../microchip16/microchip16sip6/microchip16sip6.v | 51 ++++ 6 files changed, 326 insertions(+), 141 deletions(-) create mode 100644 libtoprammer/fpga/src/microchip16/microchip16dip28/Makefile create mode 100644 libtoprammer/fpga/src/microchip16/microchip16dip28/microchip16dip28.v create mode 100644 libtoprammer/fpga/src/microchip16/microchip16sip6/Makefile create mode 100644 libtoprammer/fpga/src/microchip16/microchip16sip6/microchip16sip6.v (limited to 'libtoprammer/fpga/src') diff --git a/libtoprammer/fpga/src/microchip16/microchip16.vh b/libtoprammer/fpga/src/microchip16/microchip16.vh index 8fdb1bf..ce6b51c 100644 --- a/libtoprammer/fpga/src/microchip16/microchip16.vh +++ b/libtoprammer/fpga/src/microchip16/microchip16.vh @@ -23,148 +23,172 @@ `include "common.vh" -`define DELAY42NSEC(D42NSEC) __delay_count <= (D42NSEC) - 1;//41.666 ns wait cycle if D42NSEC = 1 +`define DUT_SDIO 35 -`define CMD_SENDSIXINSTR 0 -`define CMD_SENDREGOUTINSTR 1 +`define DELAY42NSEC(D42NSEC) __delay_count <= (D42NSEC) - 1;//41.666 ns wait cycle if D42NSEC = 1 + +`define CMD_SENDSIXINSTR 0 +`define CMD_SENDREGOUTINSTR 1 `define CMD_ENTERPM 2 +`define CMD_SEND9SIXINSTR 3 `define ENTERPM_SEQ 32'h4D434851 -`define ALL_WITHOUT_ZIF(NAME_, ID_MAJOR_, ID_MINOR_) \ - `BOTTOMHALF_BEGIN(NAME_, ID_MAJOR_, ID_MINOR_) \ - /* Programmer context */ \ - reg [7:0] prog_count; \ - reg dut_sci_manual; \ - reg dut_sci_auto; \ - wire dut_sci; \ - reg dut_sdio_driven_manual; \ - reg dut_sdio_driven_auto; \ - wire dut_sdio_driven; \ - reg dut_sdio_value_manual; \ - reg dut_sdio_value_auto; \ - wire dut_sdio_value; \ - reg dut_vpp; \ - reg [23:0] sdi_buf; \ - reg [15:0] sdo_buf; \ - reg [31:0] enterpm_seq; \ - reg sdio_auto; \ - \ - initial begin \ - prog_count <= 0; \ - dut_sci_manual <= 0; \ - dut_sci_auto <= 0; \ - dut_sdio_driven_auto <= 0; \ - dut_sdio_driven_manual <= 0; \ - dut_sdio_value_auto <= 0; \ - dut_sdio_value_manual <= 0; \ - sdi_buf <= 0; \ - sdo_buf <= 0; \ - dut_vpp <= 0; \ - sdio_auto <= 1; \ - enterpm_seq <= `ENTERPM_SEQ ; \ - end \ - \ - `ASYNCPROC_BEGIN \ - if (`CMD_IS_RUNNING) begin \ - case (`CMD_STATE) \ - 0: begin \ - case(`CMD_NR) \ - `CMD_SENDSIXINSTR: begin \ - dut_sdio_driven_auto <= 1; \ - if (prog_count > 8) begin \ - dut_sdio_value_auto <= sdi_buf[prog_count-9];\ - end \ - end \ - `CMD_SENDREGOUTINSTR: begin \ - if (prog_count == 0) begin \ - dut_sdio_value_auto <= 1; \ - end else begin \ - dut_sdio_value_auto <= 0; \ - end \ - if (prog_count < 4 ) begin \ - dut_sdio_driven_auto <= 1; \ - end else begin \ - dut_sdio_driven_auto <= 0; \ - end \ - end \ - `CMD_ENTERPM: begin \ - dut_sdio_driven_auto <= 1; \ - dut_sdio_value_auto <= enterpm_seq[31-prog_count];\ + +`define ALL_WITHOUT_ZIF(NAME_, ID_MAJOR_, ID_MINOR_) \ +`BOTTOMHALF_BEGIN(NAME_,ID_MAJOR_, ID_MINOR_) \ + /* Programmer context */ \ + reg [7:0] prog_count; \ + reg dut_sci_manual; \ + reg dut_sci_auto; \ + wire dut_sci; \ + reg dut_sdio_driven_manual; \ + reg dut_sdio_driven_auto; \ + wire dut_sdio_driven; \ + reg dut_sdio_value_manual; \ + reg dut_sdio_value_auto; \ + wire dut_sdio_value; \ + reg dut_vpp; \ + reg [23:0] sdi_buf; \ + reg [15:0] sdo_buf; \ + reg [31:0] enterpm_seq; \ + reg sdio_auto;\ + reg [3:0] dly5; \ + reg [7:0] tdly; \ + \ + initial begin \ + prog_count <= 0; \ + dut_sci_manual <= 0; \ + dut_sci_auto <= 0; \ + dut_sdio_driven_auto <= 0; \ + dut_sdio_driven_manual <= 0; \ + dut_sdio_value_auto <= 0; \ + dut_sdio_value_manual <= 0; \ + sdi_buf <= 0; \ + sdo_buf <= 0; \ + dut_vpp <= 0; \ + sdio_auto <= 1; \ + enterpm_seq <= `ENTERPM_SEQ ;\ + tdly <= 24; \ + dly5 <= 5; \ + end \ + \ + `ASYNCPROC_BEGIN \ + if (`CMD_IS_RUNNING) begin \ + case (`CMD_STATE) \ + 0: begin \ + case(`CMD_NR)\ + `CMD_SENDSIXINSTR: begin \ + dut_sdio_driven_auto <= 1; \ + if (prog_count > 3) begin \ + dut_sdio_value_auto <= sdi_buf[prog_count-4];\ + end \ + end \ + `CMD_SEND9SIXINSTR: begin \ + dut_sdio_driven_auto <= 1; \ + if (prog_count > 8) begin \ + dut_sdio_value_auto <= sdi_buf[prog_count-9];\ + end \ + end \ + `CMD_SENDREGOUTINSTR: begin \ + if (prog_count == 0) begin \ + dut_sdio_value_auto <= 1; \ + end else begin \ + dut_sdio_value_auto <= 0; \ + end \ + if (prog_count < 4 ) begin \ + dut_sdio_driven_auto <= 1; \ + end else begin \ + dut_sdio_driven_auto <= 0; \ end \ - endcase \ - `CMD_STATE_SET(1) \ - `DELAY42NSEC(5) \ - end \ - 1: begin \ - dut_sci_auto <= 1; \ - if (`CMD_IS(`CMD_SENDREGOUTINSTR) && prog_count > 11 && prog_count < 28) begin \ - sdo_buf[prog_count-12] <= zif[`DUT_SDIO];\ - end \ - `CMD_STATE_SET(2) \ - `DELAY42NSEC(5) \ - end \ - 2: begin \ - prog_count <= prog_count + 1; \ - `CMD_STATE_SET(3) \ - `DELAY42NSEC(5) \ - end \ - 3: begin \ - dut_sci_auto <= 0; /* CLK lo */ \ - \ - if ( \ - (prog_count == 32 && `CMD_IS(`CMD_ENTERPM)) ||\ - (prog_count == 33 && `CMD_IS(`CMD_SENDSIXINSTR)) ||\ - (prog_count == 28 && `CMD_IS(`CMD_SENDREGOUTINSTR)) \ - ) begin \ - `CMD_FINISH \ - prog_count <= 0; \ - dut_sdio_value_auto <= 0; \ - end else begin \ - `DELAY42NSEC(5) \ - `CMD_STATE_SET(0) \ - end \ - end \ - endcase \ - end \ - `ASYNCPROC_END \ - \ - `DATAWRITE_BEGIN \ - `ADDR(0): begin /* Run command */ \ - `CMD_RUN(in_data) \ - sdio_auto <= 1; \ - end \ - `ADDR(3): begin /* Load SDI LO BYTE sequence */ \ - sdi_buf[7:0] <= in_data; \ - end \ - `ADDR(4): begin /* Load SDI ME BYTE sequence */ \ - sdi_buf[15:8] <= in_data; \ - end \ - `ADDR(5): begin /* Load SDI HI BYTE sequence */ \ - sdi_buf[23:16] <= in_data; \ - end \ - `ADDR(9): begin /* Set signals manually */ \ - dut_sci_manual <= in_data[0]; /* SCI */ \ - dut_sdio_driven_manual <= in_data[1]; /* SDIODRIVEN */ \ - dut_sdio_value_manual <= in_data[2]; /* SDIOVALUE */ \ - sdio_auto <= 0; \ - end \ - `DATAWRITE_END \ - \ - `DATAREAD_BEGIN \ - `ADDR(0): begin /* Get SDO sequence high (bits 8-13) */ \ - out_data[7:0] <= 255; /*sdo_buf[15:8];*/ \ - end \ - `ADDR(2): begin /* Read status */ \ - out_data[0] <= `CMD_IS_RUNNING; /* busy */ \ - out_data[1] <= zif[`DUT_SDIO]; /* Raw SDO pin access */\ - end \ - `ADDR(3): begin /* Get SDO sequence low (bits 0-7) */ \ - out_data[7:0] <= 0; /*sdo_buf[7:0]; */ \ - end \ - `DATAREAD_END \ - \ - assign dut_sci = `CMD_IS_RUNNING ? dut_sci_auto : dut_sci_manual; \ - assign dut_sdio_driven = sdio_auto?dut_sdio_driven_auto:dut_sdio_driven_manual; \ - assign dut_sdio_value = sdio_auto?dut_sdio_value_auto:dut_sdio_value_manual; + end \ + `CMD_ENTERPM: begin \ + dut_sdio_driven_auto <= 1; \ + dut_sdio_value_auto <= enterpm_seq[31-prog_count];\ + end \ + endcase \ + `CMD_STATE_SET(1) \ + `DELAY42NSEC(dly5) \ + end \ + 1: begin \ + dut_sci_auto <= 1; \ + if (`CMD_IS(`CMD_SENDREGOUTINSTR) && prog_count > 11 && prog_count < 28) begin \ + sdo_buf[prog_count-12] <= zif[`DUT_SDIO];\ + end \ + `CMD_STATE_SET(2) \ + `DELAY42NSEC(dly5) \ + end \ + 2: begin \ + prog_count <= prog_count + 1; \ + `CMD_STATE_SET(3) \ + `DELAY42NSEC(dly5) \ + end \ + 3: begin \ + dut_sci_auto <= 0; /* CLK lo */ \ + \ + if (\ + (prog_count == 32 && `CMD_IS(`CMD_ENTERPM)) ||\ + (prog_count == 33 && `CMD_IS(`CMD_SEND9SIXINSTR)) ||\ + (prog_count == 28 && (`CMD_IS(`CMD_SENDREGOUTINSTR) || `CMD_IS(`CMD_SENDSIXINSTR)))\ + ) begin \ + `CMD_FINISH \ + prog_count <= 0; \ + dut_sdio_value_auto <= 0; \ + end else begin\ + if(`CMD_IS(`CMD_SENDREGOUTINSTR) && prog_count == 12 ) begin\ + `DELAY42NSEC(tdly)\ + end else begin \ + `DELAY42NSEC(dly5) \ + end \ + `CMD_STATE_SET(0) \ + end \ + end \ + endcase \ + end \ + `ASYNCPROC_END \ + \ + `DATAWRITE_BEGIN \ + `ADDR(0): begin /* Set dly5 - base clock period half, 1=42ns*/ \ + dly5 <= in_data[3:0]; \ + end \ + `ADDR(1): begin /* Set tdly - REGOUT: delay between command and data 1=42ns*/ \ + tdly <= in_data; \ + end \ + `ADDR(2): begin /* Run command */ \ + `CMD_RUN(in_data) \ + sdio_auto <= 1; \ + end\ + `ADDR(3): begin /* Load SDI LO BYTE sequence */ \ + sdi_buf[7:0] <= in_data; \ + end \ + `ADDR(4): begin /* Load SDI ME BYTE sequence */ \ + sdi_buf[15:8] <= in_data; \ + end \ + `ADDR(5): begin /* Load SDI HI BYTE sequence */ \ + sdi_buf[23:16] <= in_data; \ + end \ + `ADDR(9): begin /* Set signals manually */ \ + dut_sci_manual <= in_data[0]; /* SCI */ \ + dut_sdio_driven_manual <= in_data[1]; /* SDIODRIVEN */ \ + dut_sdio_value_manual <= in_data[2]; /* SDIOVALUE */ \ + sdio_auto <= 0; \ + end \ + `DATAWRITE_END \ + \ + `DATAREAD_BEGIN \ + `ADDR(0): begin /* Get SDO sequence high (bits 8-13) */ \ + out_data[7:0] <= sdo_buf[15:8]; \ + end \ + `ADDR(2): begin /* Read status */ \ + out_data[0] <= `CMD_IS_RUNNING; /* busy */ \ + out_data[1] <= zif[`DUT_SDIO]; /* Raw SDO pin access */\ + end \ + `ADDR(3): begin /* Get SDO sequence low (bits 0-7) */ \ + out_data[7:0] <= sdo_buf[7:0]; \ + end \ + `DATAREAD_END \ + \ + assign dut_sci = `CMD_IS_RUNNING ? dut_sci_auto : dut_sci_manual; \ + assign dut_sdio_driven = sdio_auto?dut_sdio_driven_auto:dut_sdio_driven_manual; \ + assign dut_sdio_value = sdio_auto?dut_sdio_value_auto:dut_sdio_value_manual; /* vim: filetype=verilog:shiftwidth=8:tabstop=8:softtabstop=8 */ diff --git a/libtoprammer/fpga/src/microchip16/microchip16dip14dip20/microchip16dip14dip20.v b/libtoprammer/fpga/src/microchip16/microchip16dip14dip20/microchip16dip14dip20.v index 28955fa..3df1c40 100644 --- a/libtoprammer/fpga/src/microchip16/microchip16dip14dip20/microchip16dip14dip20.v +++ b/libtoprammer/fpga/src/microchip16/microchip16dip14dip20/microchip16dip14dip20.v @@ -1,8 +1,8 @@ /* * TOP2049 Open Source programming suite * - * Microchip DIP14 and DIP20 implementation - * FPGA bottomhalf implementation + * Microchip header file for 16 bit MCUs + * FPGA Main bottomhalf implementation * * Copyright (c) 2013 Pavel Stemberk * @@ -21,8 +21,19 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. */ -`define DUT_SDIO 17 +`include "common.vh" `include "microchip16.vh" + +`define DUT_SDIO 17 + +`define DELAY42NSEC(D42NSEC) __delay_count <= (D42NSEC) - 1;//41.666 ns wait cycle if D42NSEC = 1 + +`define CMD_SENDSIXINSTR 0 +`define CMD_SENDREGOUTINSTR 1 +`define CMD_ENTERPM 2 +`define CMD_SEND9SIXINSTR 3 +`define ENTERPM_SEQ 32'h4D434851 + `ALL_WITHOUT_ZIF(microchip16dip14dip20, 32'hDF01, 1) `ZIF_UNUSED(1) @@ -75,3 +86,6 @@ `ZIF_UNUSED(48) `BOTTOMHALF_END + +/* vim: filetype=verilog:shiftwidth=8:tabstop=8:softtabstop=8 + */ diff --git a/libtoprammer/fpga/src/microchip16/microchip16dip28/Makefile b/libtoprammer/fpga/src/microchip16/microchip16dip28/Makefile new file mode 100644 index 0000000..c1a11f1 --- /dev/null +++ b/libtoprammer/fpga/src/microchip16/microchip16dip28/Makefile @@ -0,0 +1,3 @@ +NAME:=microchip16dip28 +include ../../../common/makefile +COMMONDIR:=../../../common diff --git a/libtoprammer/fpga/src/microchip16/microchip16dip28/microchip16dip28.v b/libtoprammer/fpga/src/microchip16/microchip16dip28/microchip16dip28.v new file mode 100644 index 0000000..f359226 --- /dev/null +++ b/libtoprammer/fpga/src/microchip16/microchip16dip28/microchip16dip28.v @@ -0,0 +1,90 @@ +/* + * TOP2049 Open Source programming suite + * + * Microchip header file for 16 bit MCUs + * FPGA Main bottomhalf implementation + * + * Copyright (c) 2013 Pavel Stemberk + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +`include "common.vh" +`include "microchip16.vh" + +`define DUT_SDIO 35 + +`define DELAY42NSEC(D42NSEC) __delay_count <= (D42NSEC) - 1;//41.666 ns wait cycle if D42NSEC = 1 + +`define CMD_SENDSIXINSTR 0 +`define CMD_SENDREGOUTINSTR 1 +`define CMD_ENTERPM 2 +`define CMD_SEND9SIXINSTR 3 +`define ENTERPM_SEQ 32'h4D434851 + +`ALL_WITHOUT_ZIF(microchip16dip28, 32'hDF02, 1) + `ZIF_UNUSED(1) + `ZIF_UNUSED(2) + `ZIF_UNUSED(3) + `ZIF_UNUSED(4) + `ZIF_UNUSED(5) + `ZIF_UNUSED(6) + `ZIF_UNUSED(7) + `ZIF_UNUSED(8) + `ZIF_UNUSED(9) + `ZIF_UNUSED(10) + `ZIF_UNUSED(11) + `ZIF_UNUSED(12) + `ZIF_UNUSED(13) + `ZIF_UNUSED(14) + `ZIF_UNUSED(15) + bufif0(zif[16], low, low); /* GND */ + bufif0(zif[17], high, low); /* VCC */ + `ZIF_UNUSED(18) + `ZIF_UNUSED(19) + `ZIF_UNUSED(20) + `ZIF_UNUSED(21) + `ZIF_UNUSED(22) + `ZIF_UNUSED(23) + `ZIF_UNUSED(24) + `ZIF_UNUSED(25) + `ZIF_UNUSED(26) + `ZIF_UNUSED(27) + `ZIF_UNUSED(28) + `ZIF_UNUSED(29) + `ZIF_UNUSED(30) + `ZIF_UNUSED(31) + bufif0(zif[32], low, dut_vpp); /* VPP/Reset */ + `ZIF_UNUSED(33) + `ZIF_UNUSED(34) + bufif0(zif[35], dut_sdio_value, !dut_sdio_driven); /* SDO - PGED1 */ + bufif0(zif[36], dut_sci, low); /* SCI - PGEC1 */ + `ZIF_UNUSED(37) + `ZIF_UNUSED(38) + `ZIF_UNUSED(39) + `ZIF_UNUSED(40) + `ZIF_UNUSED(41) + `ZIF_UNUSED(42) + `ZIF_UNUSED(43) + `ZIF_UNUSED(44) + `ZIF_UNUSED(45) + `ZIF_UNUSED(46) + `ZIF_UNUSED(47) + `ZIF_UNUSED(48) + +`BOTTOMHALF_END + +/* vim: filetype=verilog:shiftwidth=8:tabstop=8:softtabstop=8 + */ diff --git a/libtoprammer/fpga/src/microchip16/microchip16sip6/Makefile b/libtoprammer/fpga/src/microchip16/microchip16sip6/Makefile new file mode 100644 index 0000000..342b99f --- /dev/null +++ b/libtoprammer/fpga/src/microchip16/microchip16sip6/Makefile @@ -0,0 +1,3 @@ +NAME:=microchip16sip6 +include ../../../common/makefile +COMMONDIR:=../../../common diff --git a/libtoprammer/fpga/src/microchip16/microchip16sip6/microchip16sip6.v b/libtoprammer/fpga/src/microchip16/microchip16sip6/microchip16sip6.v new file mode 100644 index 0000000..5e8b3fb --- /dev/null +++ b/libtoprammer/fpga/src/microchip16/microchip16sip6/microchip16sip6.v @@ -0,0 +1,51 @@ +/* + * TOP2049 Open Source programming suite + * + * Microchip ICD2 SIP6 connection (implemented as DIP10) + * FPGA bottomhalf implementation + * + * Copyright (c) 2014 Pavel Stemberk + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +`define DUT_SDIO 27 +`include "microchip16.vh" +`ALL_WITHOUT_ZIF(microchip16sip6, 32'hDF05, 1) + + `ZIF_UNUSED(1) `ZIF_UNUSED(2) `ZIF_UNUSED(3) + `ZIF_UNUSED(4) `ZIF_UNUSED(5) `ZIF_UNUSED(6) + `ZIF_UNUSED(7) `ZIF_UNUSED(8) `ZIF_UNUSED(9) + `ZIF_UNUSED(10) `ZIF_UNUSED(11) `ZIF_UNUSED(12) + `ZIF_UNUSED(13) `ZIF_UNUSED(14) `ZIF_UNUSED(15) + `ZIF_UNUSED(16) `ZIF_UNUSED(17) `ZIF_UNUSED(18) + `ZIF_UNUSED(19) + `ZIF_UNUSED(20) + `ZIF_UNUSED(21) + `ZIF_UNUSED(22) + `ZIF_UNUSED(23) `ZIF_UNUSED(24) `ZIF_UNUSED(25) + bufif0(zif[26], dut_sci, low); /* SCI */ + bufif0(zif[27], dut_sdio_value, !dut_sdio_driven); /* SDO */ + bufif0(zif[28], low, low); /* GND */ + bufif0(zif[29], high, low); /* VCC */ + bufif0(zif[30], low, dut_vpp); /* VPP/Reset */ + `ZIF_UNUSED(31) `ZIF_UNUSED(32) `ZIF_UNUSED(33) + `ZIF_UNUSED(34) + `ZIF_UNUSED(35) `ZIF_UNUSED(36) `ZIF_UNUSED(37) + `ZIF_UNUSED(38) `ZIF_UNUSED(39) `ZIF_UNUSED(40) + `ZIF_UNUSED(41) `ZIF_UNUSED(42) `ZIF_UNUSED(43) + `ZIF_UNUSED(44) `ZIF_UNUSED(45) `ZIF_UNUSED(46) + `ZIF_UNUSED(47) `ZIF_UNUSED(48) +`BOTTOMHALF_END -- cgit v1.2.3